Method and apparatus for high speed cache flushing in a non-volatile memory

ABSTRACT

An invention is provided for performing flush cache in a non-volatile memory. The invention includes maintaining a plurality of free memory blocks within a non-volatile memory. When a flush cache command is issued, a flush cache map is examined to obtain a memory address of a memory block in the plurality of free memory blocks within the non-volatile memory. The flush cache map includes a plurality of entries, each entry indicating a memory block of the plurality of free memory blocks. Then, a cache block is written to a memory block at the obtained memory address within the non-volatile memory. In this manner, when a flush cache command is received, the flush cache map allows cache blocks to be written to free memory blocks in the non-volatile memory without requiring a non-volatile memory search for free blocks or requiring erasing of memory blocks storing old data.

CROSS-REFERENCE TO RELATED APPLICATION

Under 35 U.S.C. §120 the present application is a continuation of U.S.patent application Ser. No. 12/040,782, filed Feb. 29, 2008, entitled“METHOD AND APPARATUS FOR HIGH SPEED CACHE FLUSHING IN A NON-VOLATILEMEMORY,” which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

This invention relates generally to non-volatile memory, and moreparticularly to providing high speed cache flushing in a non-volatilememory.

BACKGROUND

Today, data processing systems often reduce memory access time throughthe use of cache memory. Cache memory generally is a small high speedmemory utilized to temporarily replicate portions of main memory thatare frequently accessed. As a result, the average memory access time isreduced because most memory access is to the cache memory, whichgenerally is faster than main memory. Thus, software executing on thesystem generally executes faster because most software tends to accessthe same portions of memory many times. Hence, the system is able toperform fewer memory accesses to slower main memory when the frequentlyaccessed data is stored in cache.

In general, each memory access request is passed to a cache controller,which tracks which portions of main memory are currently stored in cachememory. If a memory access request (i.e., read request or write request)is made to data currently stored in cache memory, a “cache hit” occursand the cache memory is utilized to complete the memory access request.However, if the memory access request is made to data not currentlystored in cache memory, a “cache miss” occurs, and the data is accessedfrom main memory. In some systems, when a miss occurs, the cachecontroller can assign the requested miss address to the cache memory andfetch the data from main memory to store in the cache memory.

While cache memory is useful during memory access, problems can occurduring sudden losses in power. When the system detects a pending powerproblem, the system generally needs to prepare itself for the power lossby flushing the cache memory. This can also occur at other times, suchas when the system prepares to power down. Cache flushing refers to themethod by which a system writes the data currently stored in cachememory back to main memory. That is, when the system prepares to shutdown or detects a pending power problem, the system generates a flushcache command. In response, the data stored in the cache memory iswritten to the corresponding addresses in main memory. The flush cacheprocess is generally straight forward in terms of volatile memory;however, the process is more complex when using non-volatile memory.

Non-volatile memory is memory that stores data when power isdisconnected from the system. Phase-change memory (PCM) and flash memoryare examples of non-volatile computer memory. Flash memory is anon-volatile computer memory that can be electrically erased andreprogrammed. Because flash memory retains stored data even when powerto the memory is turned off, flash memory is widely used inbattery-portable devices. For example, flash memory often is utilized indigital audio players, digital cameras, mobile phones, and USB flashdrives, which are used for general storage and transfer of data betweencomputers.

FIG. 1 is an illustration showing a typical prior art non-volatilememory arrangement. As illustrated in FIG. 1, a non-volatile memory 100generally comprises a plurality of memory blocks 102, which generally isthe smallest portion of memory that can be erased. Each memory block 102generally comprises a fixed plurality of pages 104, which is thesmallest size element that can be written or read from the non-volatilememory 100.

Unlike many other storage devices, non-volatile memory devices generallycannot be overwritten. Instead, to update data in a particular storagelocation within non-volatile memory, the location must first be erased,then the new data written in its place. Moreover, when erasing data in aflash device, an entire block must be erased instead of just theparticular page or pages of the block that were updated. To facilitatethis process, a typical flash controller will find a block of memorythat has been previously erased and write the updated page to this newblock at the same page offset. Then, the remaining pages of the oldblock are copied to the new block. Later, the old block is erased andmade available for use by some other operation. Thus, when performing aflush cache command, the system generally is required to find freememory for the data stored in cache memory prior to flushing the cachememory.

FIG. 2 is a flowchart showing a prior art method 200 for flushing cachewhen utilizing a non-volatile memory for data storage. In an initialoperation 202, preprocess operations are performed. Preprocessoperations can include, for example, detecting a pending power loss,receiving a low power mode request, and other preprocess operations thatwill be apparent to those skilled in the art.

In a search operation 204, the non-volatile memory is searched for afree memory block. After receiving a flush cache command, thenon-volatile memory is searched to find a free memory block for eachcache block in cache memory. A free memory block is a memory block thatis a good memory block (i.e., not damaged or worn out), not currentlystoring data, and has been erased. This search can be performed bysearching the actual memory array, or by searching, for example, a tablestoring data regarding the current contents of the non-volatile memoryarray.

A decision is then made as to whether a free memory block currentlyexists in the non-volatile memory, in operation 206. If a free memoryblock currently exists in the non-volatile memory, the method 200continues to operation 210. Otherwise, the method 200 branches tooperation 208.

When the non-volatile memory does not currently include a free memoryblock, an old memory is erased to enable the cache data to be written inits place, in operation 208. As mentioned above, non-volatile memorygenerally cannot be overwritten. Thus, if a free memory block does notcurrently exist in the non-volatile memory, memory needs to be freed upto make room for the cache data. When data is no longer being used innon-volatile memory, the memory block storing the data is marked asstoring old data. Generally, the memory block is erased during idleperiods. However, it is possible that old data will be present in thenon-volatile memory at the time a flush cache command is issued. Whenthis occurs, the memory block storing the old data is erased to enablethe memory block to be used to store cache data.

If a free memory block currently exists in the non-volatile memory, orafter a memory block storing old data has been erased in operation 208,the cache block is written to the free block in non-volatile memory, inoperation 210. Cached data for non-volatile memory often is stored as acache block in cache memory. Each cache block corresponds to a memoryblock in non-volatile memory. Thus, during operation 210, the currentcache block is written to non-volatile memory.

Another decision is then made as to whether more cache blocks need to bewritten to non-volatile memory, in operation 212. If more cache blocksneed to be written to non-volatile memory, the method 200 continues withanother search operation 204. Otherwise, the method 200 completes inoperation 214. Then, in operation 214, post process operations areperformed. Post process operations can include system shutdown, andother post process operations that will be apparent to those skilled inthe art.

Unfortunately, searching for free memory blocks and erasing old memoryblocks can take considerable time, depending on the size of the cachememory and the amount of non-volatile memory data cached. For example,the worst case scenario is represented by equation 1 below:

N*(T1+T2)  (1)

where N is the number of cache blocks, T1 is the erase time for a memoryblock, and T2 is the program/write time for a memory block. In typicalprior art systems, this can take in the range of about N*20 Msecs, whichis a relatively long time particularly when a power loss is pending.

In view of the foregoing, there is a need for systems and methods forproviding high speed cache flushing in a non-volatile memory. Thesystems and methods should decrease the amount of time required tocomplete a flush cache command. In addition, the systems and methodsshould not unduly burden the system or have prohibitive costs associatedwith them.

SUMMARY

Broadly speaking, the present invention addresses these needs byproviding high speed cache flushing in a non-volatile memory utilizing aflush cache map. For example, in one embodiment, a method for performinga cache flush in a non-volatile memory is disclosed. The method includesmaintaining a plurality of free memory blocks within a non-volatilememory. When a flush cache command is issued, a flush cache map isexamined to obtain a memory address of a memory block in the pluralityof free memory blocks within the non-volatile memory. The flush cachemap includes a plurality of entries, such as pointers, each entryindicating a memory block of the plurality of free memory blocks. Then,a cache block is written to a memory block at the obtained memoryaddress within the non-volatile memory. In this manner, when a flushcache command is received, the flush cache map allows cache blocks to bewritten to free memory blocks in the non-volatile memory withoutrequiring a non-volatile memory search for free blocks or requiringerasing of memory blocks storing old data. In general, each entry of theplurality of entries indicates a different free memory block of theplurality of free memory blocks in the non-volatile memory. In thiscase, the plurality of free memory blocks comprises a predeterminednumber of free memory blocks based on a predetermined number of cacheblocks being utilized with the system. In this manner, the plurality ofentries in the flush cache map can be examined sequentially to obtainaddresses of free memory blocks in which to store cache blocks.

A further method for performing a cache flush in a non-volatile memoryis disclosed in an additional embodiment of the present invention.Similar to above, the method includes maintaining a plurality of freememory blocks within a non-volatile memory. The method also includesexamining a flush cache map to obtain a memory address of a memory blockof the plurality of free memory blocks within the non-volatile memoryand writing a cache block to a free memory block at the obtained memoryaddress within the non-volatile memory. However, in this embodiment, theflush cache map also is examined to obtain an additional memory addressof a memory block of the plurality of free memory blocks within thenon-volatile memory. In this manner, a block table can be written to afree memory block at the obtained additional memory address within thenon-volatile memory. The block table generally includes data utilized bythe non-volatile memory file system, such as a plurality of entriesmapping a physical block address of the non-volatile memory to a logicalblock address. In one aspect, the plurality of entries in the flushcache map can be examined sequentially to obtain addresses of freememory blocks in which to store cache blocks and the block table.

A flush cache map for high speed cache flush in a non-volatile memory isdisclosed in a further embodiment of the present invention. The flushcache map includes a predetermined number of entries, where each entryindicates a free memory block within a non-volatile memory. As above,each of these free memory blocks is maintained free of data duringoperation of the non-volatile memory. An additional entry also isincluded, where a block table is written to the additional free memoryblock at the within the non-volatile memory. Generally, thepredetermined number is based on a predetermined number of cache blocks.Hence, to ensure a free memory block is available to store the blocktable during a flush cache command, the predetermined number can bebased on a predetermined number of cache blocks plus one. In one aspect,each entry is generated during system power-up. In this manner,embodiments of the present invention advantageously allow each cacheblock and the block table to be quickly saved in the non-volatile memorywithout requiring searches for free memory blocks. Moreover, becausefree memory blocks are reserved for cache flushing, embodiments of thepresent invention also do not require erasing of old memory blocks, thussaving additional time during a flush cache command. Other aspects andadvantages of the invention will become apparent from the followingdetailed description, taken in conjunction with the accompanyingdrawings, illustrating by way of example the principles of theinvention.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention, together with further advantages thereof, may best beunderstood by reference to the following description taken inconjunction with the accompanying drawings in which:

FIG. 1 is an illustration showing a typical prior art non-volatilememory arrangement;

FIG. 2 is a flowchart showing a prior art method for flushing cache whenutilizing a non-volatile memory for data storage;

FIG. 3 is a diagram showing a system, which includes a flush cache mapstored in memory, in accordance with an embodiment of the presentinvention;

FIG. 4 is a block diagram showing an exemplary flush cache map, inaccordance with an embodiment of the present invention;

FIG. 5 is a flowchart showing a method for high speed cache flushing ina non-volatile memory, in accordance with an embodiment of the presentinvention;

FIG. 6 is an illustration showing an exemplary block table, inaccordance with an embodiment of the present invention; and

FIG. 7 is a flowchart showing a method for high speed cache flushing ina non-volatile memory utilizing a block table and a flush cache map, inaccordance with an embodiment of the present invention.

DETAILED DESCRIPTION

An invention is disclosed for providing high speed cache flushing in anon-volatile memory utilizing a flush cache map. Broadly speaking,embodiments of the present invention utilize a map that comprises aplurality of entries, such as pointers, indicating free memory blocks innon-volatile memory. The entries can be updated as the non-volatilememory is utilized during normal operation. When a flush cache commandis received, the flush cache map is utilized to write cache blocks tofree memory blocks in non-volatile memory without requiring anon-volatile memory search for free blocks or requiring erasing ofmemory blocks storing old data.

In the following description, numerous specific details are set forth inorder to provide a thorough understanding of the present invention. Itwill be apparent, however, to one skilled in the art that the presentinvention may be practiced without some or all of these specificdetails. In other instances, well known process steps have not beendescribed in detail in order not to unnecessarily obscure the presentinvention.

FIGS. 1 and 2 were described in terms of the prior art. FIG. 3 is adiagram showing a system 300, which includes a flush cache map 322stored in memory, in accordance with an embodiment of the presentinvention. The system 300 includes a host processor 302 coupled tosystem memory 306, cache memory 320, and a memory controller 308. Thememory controller 308 is in communication with a non-volatile memory310, which includes a memory array 312 coupled to a buffer 314. Itshould be noted that the non-volatile memory 310 can be any type ofnon-volatile memory, such as PCM, flash memory, or any other type ofnon-volatile memory as will be apparent to those skilled in the artafter a careful reading of the present disclosure.

Executing on the host processor 302 is a non-volatile memory file system316, which is utilized by the system 300 to access data stored in thenon-volatile memory 310. Although the non-volatile memory file system316 is shown executing on the host processor 302 in the example of FIG.3, it should be noted that the non-volatile memory file system 316 canrun on other processors as needed by the system 300. A flush cache map322 is stored in system memory 306. As will be described in greaterdetail subsequently, the flush cache map 322 includes a plurality ofentries, such as pointers, indicating free memory blocks in thenon-volatile memory 310, which can be updated as the non-volatile memory310 is utilized during normal operation. In addition, in one embodimentof the present invention a block table 318 is stored in a memory blockof the memory array 312 of the non-volatile memory 310. As will bedescribed in greater detail subsequently, the block table 318 storesmuch of the data needed by the non-volatile memory file system 316 foraccessing data stored in the non-volatile memory 310. For example, theblock table 318 includes address mapping, block status, and wearleveling data for the non-volatile memory 310.

During power up, and during idle times, the flush cache map 322 can beconstructed. FIG. 4 is a block diagram showing an exemplary flush cachemap 322, in accordance with an embodiment of the present invention. Theflush cache map 322 includes a plurality of entries, such as pointers,indicating free memory blocks. For example, in FIG. 4, the flush cachemap 322 includes a plurality of pointers 400, each pointing to a freememory block in the memory array 312. Each pointer 400 can be, forexample, an address of a memory block within the non-volatile memoryarray 312. As mentioned previously, a free memory block is a memoryblock that is a good memory block (i.e., not damaged or worn out), notcurrently storing data, and that has been erased. In general, the numberof pointers 400 included in the flush cache map 322 can be dependent onthe amount of cache being utilized in the system 300.

In one embodiment, the flush cache map 322 is generated during power upand updated during system operation. More specifically, a predeterminednumber of free memory blocks within the non-volatile memory 310 arereserved for use with the flush cache map 322. That is, each of thereserved free memory blocks is maintained for use during a flush cachecommand. In one embodiment, the addresses of reserved memory locationscan change during operation, as long as the number of reserved freememory blocks remains adequate to store all the cache blocks beingutilized. Particular reserved memory blocks may change, for example, tomaintain wear leveling. However, embodiments of the present inventionreserved enough free memory blocks to store all the cache blocks beingutilized by the system.

The flush cache map 322 is utilized to store the cache blocks during aflush cache command. That is, when a flush cache command is generated,each cache block is written to a memory block pointed to by a pointer400 in the flush cache map 322. For example, when a flush cache commandis generated, the flush cache map 322 in the example of FIG. 4 indicatesthat the first cache block will be written to the memory block ataddress 2 in the non-volatile memory array 312. The second cache blockis written to the memory block at address 2023, and so on, until thelast cache block is written to the memory block at address 4094.Although particular addresses are shown in FIG. 4 for illustrationpurposes, it should be noted that the pointers 400 of the flush cachemap 322 can store any value as is appropriate for the particularnon-volatile memory being utilized.

FIG. 5 is a flowchart showing a method 500 for high speed cache flushingin a non-volatile memory, in accordance with an embodiment of thepresent invention. In an initial operation 502, preprocess operationsare performed. Preprocess operations can include, for example,generating a flush cache map having pointers to reserved free memoryblocks in non-volatile memory, detecting a pending power loss, receivinga low power mode request, and other preprocess operations that will beapparent to those skilled in the art after a careful reading of thepresent disclosure.

In operation 504, the first cache block in cache memory replicating amemory block in non-volatile memory is written to the memory block innon-volatile memory indicated by the first pointer in the flush cachemap. As mentioned above, a particular number of free memory blockswithin the non-volatile memory are reserved for use with the flush cachemap. In one embodiment, the addresses of reserved memory locations canchange during operation, as long as the number of reserved memory blocksremains adequate to store all the cache blocks being utilized. The flushcache map includes a plurality of pointers, each pointing to a reservedfree memory block in the memory array of the non-volatile memory. Ingeneral, the number of pointers included in the flush cache map can bedependent on the amount of cache being utilized in the system.

A decision is then made as to whether more cache blocks need to beflushed from cache memory, in operation 506. The cache memory mayinclude a plurality of cache blocks replicating memory blocks in thenon-volatile memory. Each of these cache blocks are written tonon-volatile memory when a flush cache command is generated. Hence, ifmore cache blocks need to be flushed from cache memory, the method 500continues with operation 508. Otherwise, the method completes inoperation 510.

In operation 508, the next cache block in cache memory replicating amemory block in non-volatile memory is written to the memory block innon-volatile memory indicated by the next pointer in the flush cachemap. For example, during operation 504, using the flush cache map 322 inthe example of FIG. 4, the first cache block is written to the memoryblock at address 2 in the non-volatile memory 310. Then, in operation508, the next cache block in cache memory is written to the memory blockindicated by the next pointer in the flush cache map 322, in this caseaddress 2023, and so on, until the last cache block is written to thememory block at address 4094.

When no more cache blocks need to be flushed from cache memory, themethod 500 completes in operation 510. Post process operations areperformed in operation 510. Post process operations can include, forexample, performing cache flush for other system memory, power downoperations, and other post process operations that will be apparent tothose skilled in the art after a careful reading of the presentdisclosure. In addition to pointers for cache blocks, in one embodimentan additional pointer is maintained in the flush cache map 322 to amemory block for storing the block table 318.

FIG. 6 is an illustration showing an exemplary block table 318, inaccordance with an embodiment of the present invention. The block table318 includes logical block addresses 600, memory block status flags 602,physical block addresses 604, wear level indicators 606, and read countdata 608. It should be noted, however, that a block table 318 of theembodiments of the present invention can include any data useful to thenon-volatile file system in the operation of the non-volatile memory, aswill be apparent to those skilled in the art after a careful reading ofthe present disclosure.

Each row of the bock table 318 corresponds to a particular logical blockaddress 600, which is the memory block address used by the system whenrequesting access to data from the non-volatile memory. Thus, the datain each row of the block table 318 corresponds to the particular logicaladdress 600 listed in the logical block address column of the blocktable 318. For example, the memory block status flags 602, physicaladdress data 604, wear level indicators 606, and read count data 608 onrow 1 of the block table 318 correspond to the logical address 1.

As mentioned above, each row of the block table 318 includes memoryblock status flags 602, a physical block address 604, a wear levelindicator 606, and read count data 608. The memory block status flags602 indicate the availability of a particular block. For example, thememory block status flags 602 can be utilized to indicate whether aparticular block is bad (i.e., worn out), currently in use, free, or olddata but not yet erased. The physical block address 604 stores theactual physical address in the non-volatile memory of the dataassociated with the corresponding logical address 600. The wear levelindicator 606 stores the wear level for the associated physical blockaddress 604. Generally, the wear level indicator 606 provides anindication of the wear level of the particular physical block addressrelative to the other physical block addresses in the non-volatilememory. The wear level data is utilized by the non-volatile memory filesystem to provide more even wear or use of the different memory blocklocations in the non-volatile memory. The read count data 608 providesan indication of the number of reads occurring within the associatedmemory block. In operation, the read count data 608 associated with aparticular memory block is increment each time a page from theassociated memory block is read from the non-volatile memory. When theread count 508 reaches a predetermined threshold value, the data storedin the associated memory block is moved to another memory block inphysical memory.

In one embodiment, the block table 318 is loaded from the non-volatilememory 310 into system memory 306. The block table 318′ loaded in systemmemory 306 then is utilized by the non-volatile memory file system 316to access data in the non-volatile memory 310. For example, to accessdata in the non-volatile memory 310, the non-volatile memory file system316 examines the block table 318′ stored in system memory 306 todetermine the physical address of a particular logical address that thesystem 300 wants to access. The non-volatile memory file system 316 theninstructs the memory controller 308 to access the data in the memoryarray 312 at the particular physical address. As data is being accessedand moved in the non-volatile memory 310, the block table 318′ in systemmemory 306 is updated to reflect the changes in the data stored in thenon-volatile memory 310. Periodically, and at system shutdown, the blocktable 318′ stored in system memory 306 is written to the non-volatilememory 310. The block table 318 can be written to a different locationwithin the memory array 312 of the non-volatile memory 310 each time theblock table 318 is written to the non-volatile memory 310.

As with cache blocks in the cache memory, when the system detects apending loss of power and generates a flush cache command, the blocktable 318′ stored is system memory 306 is written to a free memory blockin non-volatile memory 310 based on the flush cache map 322. That is,when a flush cache command is generated, the flush cache map 322 isexamined to determine a free memory block in the non-volatile memory 310in which to store the block table 318′.

FIG. 7 is a flowchart showing a method 700 for high speed cache flushingin a non-volatile memory utilizing a block table and a flush cache map,in accordance with an embodiment of the present invention. In an initialoperation 702, preprocess operations are performed. Preprocessoperations can include, for example, generating a flush cache map havingpointers to reserved free memory blocks in non-volatile memory,detecting a pending power loss, updating the block table, and otherpreprocess operations that will be apparent to those skilled in the artafter a careful reading of the present disclosure.

In operation 704, the first cache block in cache memory replicating amemory block in non-volatile memory is written to the memory block innon-volatile memory indicated by the first pointer in the flush cachemap. As mentioned above, the flush cache map includes a plurality ofpointers, each pointing to a reserved free memory block in the memoryarray of the non-volatile memory. In general, the number of pointersincluded in the flush cache map can be dependent on the amount of cachebeing utilized in the system. In addition, as will be discussed ingreater detail subsequently, in one embodiment a pointer is maintainedin the flush cache map to an additional reserved memory block forstorage of the block table. Thus, the flush cache map generally includesN+1 pointers, where N is the number of cache blocks utilized in thesystem.

A decision is then made as whether more cache blocks need to be flushedfrom cache memory, in operation 706. The cache memory may include aplurality of cache blocks replicating memory blocks in the non-volatilememory. Each of these cache blocks are written to non-volatile memorywhen a flush cache command is generated. Hence, if more cache blocksneed to be flushed from cache memory, the method 700 branches tooperation 708. Otherwise, the method continues in operation 710.

In operation 708, the next cache block in cache memory replicating amemory block in non-volatile memory is written to the memory block innon-volatile memory indicated by the next pointer in the flush cachemap. For example, during operation 704, using the flush cache map 322 inthe example of FIG. 4, the first cache block is written to the memoryblock at address 2 in the non-volatile memory 310. Then, in operation708, the next cache block in cache memory is written to the memory blockindicated by the next pointer in the flush cache map 322, in this caseaddress 2023, and so on, until the last cache block is written to thememory block at address 4094.

When no more cache blocks need to be flushed from cache memory, theblock table is written to the memory block indicated by the next pointerin the flush cache map. As mentioned above, the flush cache map includesa pointer to an additional reserved memory block for storage of theblock table. Post process operations are performed in operation 712.Post process operations can include, for example, performing cache flushfor other system memory, power down operations, and other post processoperations that will be apparent to those skilled in the art after acareful reading of the present disclosure.

Hence, embodiments of the present invention advantageously allow eachcache block and the block table to be quickly saved in a non-volatilememory without requiring searches for free memory blocks. Moreover,because free memory blocks are reserved for cache flushing, embodimentsof the present invention also do not require erasing of old memoryblocks, thus saving additional time during a flush cache command.

Moreover, on systems incorporating COMMAND-DMA hardware, the commands towrite the cache blocks and the block table to the memory blocksindicated in the flush cache map can be pre-built in a separate commandchain in RAM and be ready to execute without the need for firmware toprocess the building of the command chain. In this manner, the firmwareonly needs to inform the hardware of the location of the pre-builtcommand chain and instruct the hardware to start processing that chain.

Although the foregoing invention has been described in some detail forpurposes of clarity of understanding, it will be apparent that certainchanges and modifications may be practiced within the scope of theappended claims. Accordingly, the present embodiments are to beconsidered as illustrative and not restrictive, and the invention is notto be limited to the details given herein, but may be modified withinthe scope and equivalents of the appended claims.

1. A method for performing a cache flush in a non-volatile memory,comprising the operations of: maintaining a plurality of free memoryblocks within a non-volatile memory until a flush cache command isreceived; examining a flush cache map in response to the flush cachecommand to obtain a memory address of a memory block of the plurality offree memory blocks within the non-volatile memory, wherein the flushcache map includes a plurality of entries, each entry indicating amemory block of the plurality of free memory blocks; writing a cacheblock to a memory block at the obtained memory address within thenon-volatile memory, wherein the plurality of free memory blockscomprises a predetermined number of free memory blocks, and wherein thepredetermined number is based on a predetermined number of cache blocks.2. The method as recited in claim 1, wherein each entry of the pluralityof entries indicates a different free memory block of the plurality offree memory blocks in the non-volatile memory.
 3. The method as recitedin claim 1, wherein the plurality of free memory blocks comprises apredetermined number of free memory blocks, and wherein thepredetermined number is based on a predetermined number of cache blocks.4. The method as recited in claim 1, wherein the plurality of entries inthe flush cache map is examined sequentially to obtain addresses of freememory blocks in which to store cache blocks.
 5. The method as recitedin claim 1, wherein the flush cache map further includes an entryindicating a free memory block in which to store a block table, whereinthe block table includes a plurality of entries mapping a physical blockaddress of the non-volatile memory to a logical block address.
 6. Amethod for performing a cache flush in a non-volatile memory, comprisingthe operations of: maintaining a plurality of free memory blocks withina non-volatile memory; examining a flush cache map to obtain a memoryaddress of a memory block of the plurality of free memory blocks withinthe non-volatile memory, wherein the flush cache map includes aplurality of entries, each entry indicating a memory block of theplurality of free memory blocks; writing a cache block to a free memoryblock at the obtained memory address within the non-volatile memory; andexamining the flush cache map to obtain an additional memory address ofa memory block of the plurality of free memory blocks within thenon-volatile memory, wherein a block table is written to a free memoryblock at the obtained additional memory address within the non-volatilememory, wherein the plurality of free memory blocks comprises apredetermined number of free memory blocks, and wherein thepredetermined number is based on a predetermined number of cache blocks.7. The method as recited in claim 6, wherein the block table includes aplurality of entries mapping a physical block address of thenon-volatile memory to a logical block address.
 8. The method as recitedin claim 6, wherein each pointer of the plurality of entries indicates adifferent free memory block of the plurality of free memory blocks inthe non-volatile memory.
 9. The method as recited in claim 6, whereinthe plurality of free memory blocks comprises a predetermined number offree memory blocks, and wherein the predetermined number is based on apredetermined number of cache blocks.
 10. The method as recited in claim6, wherein the plurality of entries in the flush cache map is examinedsequentially to obtain addresses of free memory blocks in which to storecache blocks.
 11. The method as recited in claim 6, wherein the flushcache map is examined in response to a flush cache command.
 12. Themethod as recited in claim 6, wherein the block table includes wearlevel data for memory blocks in the non-volatile memory.
 13. A flushcache map for high speed cache flush in a non-volatile memory,comprising: a predetermined number of entries, wherein each entryindicates a free memory block within a non-volatile memory, and whereineach free memory block is maintained free of data during operation ofthe non-volatile memory; and an additional entry indicating anadditional free memory block within the non-volatile memory, wherein ablock table is written to the additional free memory block within thenon-volatile memory.
 14. The flush cache map as recited in claim 13,wherein the predetermined number is based on a predetermined number ofcache blocks.
 15. The flush cache map as recited in claim 13, whereinthe predetermined number is further based on a predetermined number ofcache blocks plus one.
 16. The flush cache map as recited in claim 13,wherein each entry of the plurality of pointers indicates a differentfree memory block in the non-volatile memory.
 17. The flush cache map asrecited in claim 13, wherein each entry is generated during systempower-up.